Regviz

NXP Semiconductors /NeoM3 /IOCON /P2_10

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as P2_10

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/NeoM3/IOCON/P2_10#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (P2_10)FUNC

FUNC=P2_10

Description

I/O configuration register for pin P2[10]

Fields

FUNC

Selects pin function for pin P2[10]

0 (P2_10): General purpose digital input/output pin. This pin includes a 5 ns input glitch filter.A LOW on this pin while RESET is LOW forces the on-chip boot loader to take over control of the part after a reset and go into ISP mode.

1 (EINT0): External interrupt 0 input.

2 (NMI): Non-maskable interrupt input.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data